A liquid crystal display panel to make up a liquid crystal display device of active matrix type has a liquid crystal interposed between a substrate (an active matrix substrate) and another substrate (a color filter substrate). In a manufacturing process to prepare a thin-film transistor (TFT) on the active matrix substrate, a plurality of gate lines disposed in parallel to each other and comprising metal film such as chromium are prepared on said substrate, and a gate electrode extending from each of said gate lines to each pixel is formed.
FIG. 17 represents diagrams to explain an equivalent circuit of a display panel of a liquid crystal display device of active matrix type. FIG. 17(a) is a circuit diagram of the entire device, and FIG. 17(b) is an enlarged view of the diagram of a pixel unit PXL in FIG. 17(a). In FIG. 17(a), a multiple of pixel units PXL are arranged in matrix-like form on a display panel PNL. Each pixel PXL is selected at a scan line driving circuit GDR and is turned on according to a display data signal from a data line (also called “source line”) driving circuit DDR.
Specifically, in response to the gate line GL selected by the scan line driving circuit GDR, a display data (voltage) is sent to a thin-film transistor TFT on the pixel unit PXL of the display panel PNL via a data line DL from the data line driving circuit DDR.
As shown in FIG. 17(b), the thin-film transistor TFT to constitute the pixel unit PXL is provided at an intersection of the gate line GL and the data line DL. The gate line GL is connected to a gate electrode GT of the thin-film transistor TFT, and the data line DL is connected to a drain electrode or a source electrode (“drain electrode” at this moment) SD2 of the thin-film transistor TFT.
The drain electrode or the source electrode (“source electrode” at this moment) SD1 of the thin-film transistor TFT is connected to a pixel electrode PX of a liquid crystal (element) LC. The liquid crystal LC is positioned between a pixel electrode PX and a common electrode CT and is driven by a data (voltage) to be supplied to the pixel electrode PX. An auxiliary capacity Ca to temporarily maintain the data is connected between the drain electrode SD2 and an auxiliary capacity line CL.
FIG. 18 represents a plan view to show a pixel unit PXL of a display panel PNL shown in FIG. 17 and a cross-sectional view to explain an arrangement of a thin-film transistor TFT to make up the pixel unit PXL. Specifically, FIG. 18(a) is a plan view of a pixel unit PXL arranged in matrix-like form as shown in FIG. 17, and FIG. 18(b) is a cross-sectional view of the thin-film transistor TFT in the pixel unit PXL along the line A-A′.
As shown in FIG. 18(a), in the pixel unit PXL arranged in matrix-like form, the thin-film transistor TFT is disposed at an intersection of the gate line GL and the data line DL. Also, a pixel electrode PX is connected to the thin-film transistor TFT, and an auxiliary capacity is formed with the auxiliary capacity line CL.
In FIG. 18(b), in the thin-film transistor TFT, a gate electrode GT and a gate insulator GI to cover the gate electrode GT are prepared on an insulating substrate SUB1. On the insulator, a silicon (Si) semiconductor layer SI, an ohmic contact layer (n+ Si) NS, a source electrode SD1 and a drain electrode SD2 are sequentially laminated on the insulator.
To prepare a gate insulator GI, silicon nitride (SiNx) is deposited to cover the gate line GL and the gate electrode GT, and a plurality of data lines DL are prepared to intersect the gate lines GL. At the same time as the preparation of the data lines DL, the source electrode SD1 and the drain electrode SD2 are formed on the same layer.
As described above, in a region enclosed by each gate line GL and each data line DL, a unit pixel comprising a pixel unit PXL is provided. This unit pixel has a sub-pixel of a single color (red, green, or blue) in case of full-color display. Hereinafter, the unit pixel is also simply referred as “pixel”. The thin-film transistor (TFT) to make up the pixel unit PXL comprises, as described above, a gate electrode, a silicon semiconductor film prepared by patterning on the gate electrode, an ohmic contact layer (n+ silicon) separately formed on upper layer of the silicon semiconductor film, and a source electrode and a drain electrode connected respectively to the separated ohmic contact layer.
On the upper layer of the thin-film transistor, a protective layer PAS is deposited. On it, a pixel electrode PX—preferably made of ITO, is prepared by patterning, and it is connected to the source electrode (or to the drain electrode) SD1 via a contact hole provided in the protective film PAS. An orientation film (not shown) is deposited to cover the pixel electrode PX.
On the other hand, on another substrate (not shown in the figure), a counter electrode (in FIG. 17(b)) is prepared via a smooth layer (overcoat layer) and a 3-color filter (in case of full-color display). An orientation film is deposited to cover the counter electrode. An active matrix substrate (i.e. one of the substrates as described above) is superimposed on it, and a liquid crystal is sealed in a gap therebetween.
The Patented Reference 1 as given below discloses a method for manufacturing lines of the active matrix substrate as described above by means of ink jet coating method. In the Patented Reference 1, the gate electrode of the thin-film transistor TFT is prepared by ink jet coating method using a liquid containing a conductive material. Also, it is described that a source electrode and a drain electrode of the thin-film transistor are prepared by ink jet coating method using a liquid containing a semiconductor material.
[Patented Reference 1] JP-2003-318193
The gate insulator to be formed on the active matrix substrate of the liquid crystal display panel is provided to insulate the gate line and data line. The thinner the gate insulator is, the more the performance of the thin-film transistor are improved. Also, the thinner the gate insulator is, the finer the auxiliary capacity line can be produced, and this contributes to the improvement of aperture rate. However, when the gate insulator is thinner, cross capacity at the intersection with the data line is increased, and this results in the delay of signal. Also, the counter capacity between the gate line and the counter electrode is also increased. If the gate insulator is designed thicker to reduce the cross capacity and counter capacity, performance of the thin-film transistor are decreased as described above.
It is an object of the present invention to provide a liquid crystal display device, which can be operated at high speed and with high precision by improving performance characteristics of the thin-film transistor without increasing cross capacity and counter capacity.